sysCLOCK PLL and Oscillator

The MachXO1200 and MachXO2280 PLDs feature sysCLOCK PLL to provide clock management capabilities. These blocks also provide skew management and duty cycle correction capabilities.

• Dynamic Delay Adjustment
• Frequency range 25 to 375 MHz
• Low output period jitter (+/- 125ps)
• Programmable phase/duty cycle (45 degree steps)
• Internal and External Feedback

All MachXO PLDs have an internal CMOS oscillator. The oscillator can be routed as an input clock to the clock tree or to the general routing resources. There is a dedicated programming bit to enable/disable the oscillator. The oscillator frequency ranges from 18MHz to 26MHz and can be divided by internal logic.