Overview
 Lattice offers Development Kits for key application markets such as connectivity, high-speed communications, and video/imaging. The kits typically include pre-configured demo bitstreams along with GUI/API and drivers for quick evaluation, source files for the GUI and drivers to recreate the demo and GUI, RTL project directory source files to use as a design template, and an evaluation board to take designs rapidly to hardware. Lattice's ispLEVER or PAC-Designer design tool suite is required in order to use the Development Kits.
The following Development Kits are currently available:
With Lattice Development Kits, designers can:
- Accelerate the time to create a prototype
- Enhance the design flow for better productivity
- Create a solution compliant to industry standards
 Accelerate Time to Prototype
Lattice Development Kits have been created to help accelerate the design cycle and get to prototyping quickly. The Development Kits provide a known good design and demo as a starting point for evaluation and design exploration. From there, you can rebuild the design, rebuild the demo and drivers, and then even modify the design and drivers to create your own implementation. This reduces design cycle time from weeks to days, and with a Lattice evaluation board, accelerates you to a working prototype.
Enhanced Design Flow for Better Productivity
Each of the kits leverages the standard ispLever design flow and complements it with enhanced tools for better design productivity. The evaluation netlist bitstreams included in each Development Kit are pre-configured versions of Lattice's ispLeverCORE modules. Using these with the included demos, designers can set parameters and view results of typical system operation. RTL source files for top-level project directories are also included, so that designers can use them as an IP instantiation template or recreate the evaluation bitstreams using the ispLEVER design flow. Drivers can also be regenerated as well using the supplied driver source files. Designers can also configure IP and generate their own bitstreams by accessing the IP modules through the IPexpress flow of the ispLEVER design tool suite. Using this design flow, trial designs can be conceived and prototyped on an evaluation board in minutes.
Compliance to Industry Standards
Several of the IP cores and evaluation boards included in Lattice Development Kits have been subjected to compliance and interoperability testing with industry standards bodies such as PCI-SIG. This gives designers confidence that an application developed with a Lattice Development Kit is high quality, reliable, and interoperable with existing systems based on those standards.
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