LatticeECP3 AMC Evaluation Board

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The LatticeECP3 AMC Evaluation Board allows designers to investigate and experiment with the features of the LatticeECP3 high-speed SERDES transceivers in an advanced mezanine card (AMC) system environment. The features of the LatticeECP3 AMC Evaluation Board assist engineers with rapid prototyping and testing of their designs. The board follows portions of the PICMG AMC R2.0 AMC form-factor specification that allows users the capability to use the board in live system evaluations.

Board Features

• Single module AMC PCB card edge interface
  • Allows demonstration of AMC Fat Pipes
  • Common options interface
• Allows control of SERDES PCS registers using the Serial Client Interface (ORCAstra)
• DMC (FPGA Mezzanine Card) expansion connector
• USB-B connection to UART for run-time control
• RJ45 interface to 10/100/1000 Ethernet to SGMII
• SFP transceiver module cage and connection
• On-board Boot Flash
  • 64M Serial SPI Flash
• DDR2 memory components (256MB x 32 bits)
• 32-bit parallel, non-volatile memory that can be read, erased and reprogrammed
• Switches, LEDs and displays for demonstration purposes
• ispVM™ System software programming support
•  On-board reference clock sources

The board can be used as provided with a front-panel SFP cage that accepts industry standard transceiver modules. It also includes a RJ45 network jack for Ethernet communication. However, by removing the SFP and RJ45 the board can be used with a standard VITA 57.1 FPGA Mezzanine Card. This permits user-specific FMCs to be used with the LatticeECP3 AMC Evaluation Board.

Demonstrations

Serial RapidIO Loopback Bitstream Demo: This is a menu driven demonstration that provides the ability to configure SRIO parameters, display core status and errors and examine local SRIO configuration registers as well as link partner registers. Also supported are the transfers of various SRIO packet types such as memory transactions and maintenance read/write transactions.

Default Programming Files

Serial RapidIO Throughput Demo: This demonstration will add the ability for the user to configure the board to measure data throughput capability of the SRIO 2.1 IP core.

For more information on the Serial RapidIO IP Core click here.

For more information Wireless Solutions from Lattice click here.

Ordering Information

Part Number: LFE3-150EA-AMC-EVN
For ordering information contact your local Lattice sales representative.