Optimized FPGA Architecture for low Cost Non-Volatile Applications

LatticeXP2 FPGAs combine on-chip Flash memory with SRAM configuration in a unique architecture refered to as flexiFLASH. This is applied to an optimized low cost architecture that delivers high performance sysMEM embedded RAM blocks, distributed memory, sysCLOCK PLLs, DDR memory interfaces, sysIO buffers, and more.

Features Not Shown on the Diagram

• Eight Global clock nets
• Eight Regional clocks
• Two Edge Clocks per side