Lattice Semiconductor Corporation
Home > Products > Intellectual Property > Reference Designs > 5V and 3.3V Hot Swap Controller

5V and 3.3V Hot Swap Controller

Lattice Reference DesignsThis reference design implements a hot swap controller design within a Power Manager II mixed-signal PLD. The design manages 5V and 3.3V supply rails to limit inrush current to a user-defined level. It also initiates a shut-down if either supply exhibits a short-circuit. By sensing the voltage across the MOSFET and limiting the inrush current, the design operates the transistors in the Safe Operation Area (SOA).

Features

RD1057 Block Diagram

 

Tested Devices* Macrocells Product Terms VMONs I/Os Timers Revision
ispPAC-POWR1014A 13 56 6 2 2 1.0

 

PDF file download design documentation (RD1057)

 

EXE files download source code

 

* May work in other devices as well.

Note: The performance and design sizes shown above are estimates only. The actual results may vary depending upon the chosen parameters, timing constraints, and device implementation. See the design's documentation for details. All coding and design work was done on a PC platform unless noted otherwise.

 

Legal | Privacy Policy | Press | Careers | Investor Relations | Contact Us | Site Map | | Follow us  Lattice Semiconductor on Facebook  Lattice Semiconductor on Twitter  Lattice Semiconductor on YouTube  © Lattice Semiconductor Corporation 2012