Ready to Use Wireless Portfolio

Lattice provides customers with low cost and low power programmable solutions that are ready-to-use right out of the box.  For the wireless space, a full suite of tested solutions are available that include:

• FPGAs with Embedded SERDES compliant to CPRI, OBSAI, Serial RapidIO and JESD204 standards.
• FPGAs with I/O to Support High-Speed Parallel Interfaces Found on Data Conversion Devices.
• FPGAs with Embedded, High Performance DSP blocks.
• A Portfolio of Soft IP Cores and reference designs.
• Application Specific Development Boards and Demonstration Designs
• Test and Interoperability Reports for PMA, PCS and Generic I/O.
• Cooperation with leading ASSP Vendors and Intellectual Property (IP) Partners to Promote Joint System Solutions

LatticeECP3 & LatticeECP2M: Industry Leading Programmable Wireless Platforms

Learn more about LatticeECP3 & LatticeECP2M

RRH Solutions Using LatticeECP3 FPGA Family

Intellectual Property: Rich Portfolio of Soft IP and Reference Designs

Lattice provides a comprehensive portfolio of soft and hard wireless IP including Connectivity support. Also available are reference designs in support of data conversion as well as other signal processing functionality.  By targeting the LatticeECP3 and LatticeECP2M platforms, developers will drastically reduce cost, power and footprint over competitive solutions.

Wireless IP Portfolio

Function		Vendor	ECP3	ECP2M
Serial Baseband Interconnect
	Low Latency CPRI IP Core for Baseband Data Transport	Lattice
	RP3-01 OBSAI IP Core for Baseband Data Transport	Lattice
	SRIO IP Core for Wireless Infrastructure Chip-to-Chip Interconnect	Praesum, Lattice
	Gigabit Ethernet and SGMII IP Core	Lattice
	PCI Express Endpoint IP Core	Lattice
Data Conversion
	JESD204a ADC Interface IP Core	Lattice	Coming!	Coming!
	JESD204 ADC Interface Reference Design	Lattice
	High Speed Serialized LVDS Interface Reference Design for TI ADS64XX family of ADCs	Lattice
	High Speed Serialized LVDS Interface Reference Design and Evaluation Platform for TI ADS6000 family of ADCs	Lattice
Signal Processing Reference Designs and IP
	Crest Factor Reduction IP core	Affarii
	Digital Pre-Distortion IP core	Affarii
	Digital Up/Down Converters (DUC, DDC)	Affarii
	Digital Up/Down Converters (DUC, DDC) for 4G Reference Design	Lattice
	3GPP-LTE CTC Decoder IP Core	TurboConcept
	WiMAX 802.16 CTC Decoder IP Core	TurboConcept
	Block Viterbi Decoder IP Core	Lattice
	Dynamic Block Reed-Solomon Encoder IP Core	Lattice
	FFT compiler IP Core	Lattice
	Numerically Controlled Oscillator (NCO) IP Core	Lattice
	FIR Filter Generator IP Core	Lattice
	Distributed Arithmetic FIR (DA FIR) IP Core	Lattice
	CORDIC IP Core	Lattice
DSP Building Blocks
	Listing of DSP IP cores and reference designs from Lattice and our ispLeverCORE Connections Partners	Lattice / Partners
Embedded Processors
	LatticeMico8 open source microcontroller	Lattice
	LatticeMico32 open source microprocessor	Lattice

Development Boards and Demonstration Designs

Lattice Development Kits combine application specific evaluation boards, IP and relevant reference designs in one comprehensive package. The Solution Kits allow a potential user to quickly and seamlessly evaluate the Lattice Wireless Solutions portfolio, and to use it as a basis for customer specific development.

Electrical (PMA) Testing

To ensure compliance to 1000BaseX standards, we have tested our SERDES Physical Medium Attachment (PMA) to relevant ANSI 11.2 and IEEE802.3 specifications. Testing methdology and results can be found below:

PMA Electrical Characterization

• TN1084 and Supplements (available under NDA) for PCI Express Transmit Jitter Specifications.