PCI Express (Peripheral Component Interconnect Express) is a high performance, scalable, well defined standard for a wide variety of computing and communications platforms. It has been defined to provide software compatibility with existing PCI drivers and operating systems. Lattice provides customers with low-cost and low-power programmable solutions that are ready-to-use right out of the box. For PCI Express a full suite of tested and interoperable solutions is available that includes:
Lattice provides a comprehensive portfolio of soft and hard PCI Express IP, including DMA and Memory Controllers. By targeting the LatticeECP3, LatticeECP2M and LatticeSC/M platforms, developers will drastically reduce cost, power and footprint over competitive solutions.
| IP | Vendor | LatticeECP3 | LatticeECP2M | LatticeSCM |
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PCI Express Root Complex Lite IP Core (x1, x4)![]() |
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| PCI Express Endpoint IP Core (x1, x4) | Lattice | ![]() |
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| DDR SDRAM Controller - Pipelined | Lattice | ![]() |
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| DDR2 SDRAM Controller - Pipelined | Lattice | ![]() |
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| Scatter-Gather Direct Memory Access (DMA) Controller | Lattice | ![]() |
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| PCS Pipe | Lattice | ![]() |
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| Hard PCI Express x1 and x4 | Lattice | ![]() |
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| Hard Memory Controller | Lattice | ![]() |
Our Development Kits combine application specific evaluation boards, evaluation PCI Express IP, relevant reference designs and host software and drivers in one comprehensive package. The Solution Kits allow a potential user to quickly and seamlessly evaluate the Lattice PCI Express Solutions portfolio, and to use it as a basis for customer specific PCI Express development.
Also listed below are the various boards and demos for PCI Express.
| DEVELOPMENT KITS & Demos | LatticeECP3 | LatticeECP2M | LatticeSCM |
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PCI Express Development Kit for LatticeECP3
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PCI Express Root Complex Lite x1 Demo![]() |
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PCI Express Development Kit for LatticeECP2M
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PCI Express Development Kit for LatticeSCM
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| BOARDS | LatticeECP3 | LatticeECP2M | LatticeSCM |
| LatticeECP3 PCI Express Solutions Board | ![]() |
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| LatticeECP3 Serial Protocol Evaluation Board | ![]() |
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| LatticeECP2M PCI Express x1 / x4 Solutions Board | ![]() |
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| LatticeECP2M PCI Express x4 Evaluation Board | ![]() |
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| LatticeECP2M SERDES Evaluation Board | ![]() |
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| LatticeSC PCI Express x4 and x8 Evaluation Boards | ![]() |
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| LatticeSC PCI Express x1 Evaluation Board | ![]() |
Trellisys |
Trellisys provides a x1 and x4 Bus Functional Model for PCI Express 1.1 Endpoint to help customers develop robust testbenches. The BFM integrates seamlessly with Lattice PCI Express IP offering. |
Lattice tests all critical components of the PCI Express stack rigorously, and puts a great deal of emphasis on interoperability with proven 3rd party silicon platforms. The following test documentation is available for customer review.
Lattice is a regular participant of the PCI SIG and its Compliance Workshop programs. Testing is done on Lattice designed PCI Express End Point Add-in cards. All PCI Express End Point solutions have undergone rigorous testing and are currently compliant to Version 1.1 of the PCI Express specification. The following test are performed at the SIG:
Lattice PCI Express solution undergo peer to peer compatibility tests with various motherboards and processors. These tests are held internally as well as at the PCI SIG Compliance Workshops. The Lattice PCI Express solutions have successfully completed interoperability with over 20 motherboards with a variety of processors.